SheikahWolf/DC-Load-Analog
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Update SCH and PCB

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This commit is contained in:
SheikahakiehS 2021-04-22 16:53:16 +08:00
parent 0452a990d9
commit 7cac389f38
3 changed files with 548 additions and 569 deletions
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1093
DC-Load-Analog.kicad_pcb
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File diff suppressed because it is too large Load Diff

4
DC-Load-Analog.sch
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@ -445,7 +445,7 @@ L Device:C C1
U 1 1 6081DC29 U 1 1 6081DC29
P 1225 4775 P 1225 4775
F 0 "C1" H 1340 4821 50 0000 L CNN F 0 "C1" H 1340 4821 50 0000 L CNN
F 1 "1UF" H 1340 4730 50 0000 L CNN F 1 "1UF.35V" H 1340 4730 50 0000 L CNN
F 2 "Resistor_SMD:R_0805_2012Metric" H 1263 4625 50 0001 C CNN F 2 "Resistor_SMD:R_0805_2012Metric" H 1263 4625 50 0001 C CNN
F 3 "~" H 1225 4775 50 0001 C CNN F 3 "~" H 1225 4775 50 0001 C CNN
1 1225 4775 1 1225 4775
@ -566,7 +566,7 @@ L Device:C C3
U 1 1 608395C7 U 1 1 608395C7
P 1225 6650 P 1225 6650
F 0 "C3" H 1340 6696 50 0000 L CNN F 0 "C3" H 1340 6696 50 0000 L CNN
F 1 "1UF" H 1340 6605 50 0000 L CNN F 1 "1UF.35V" H 1340 6605 50 0000 L CNN
F 2 "Resistor_SMD:R_0805_2012Metric" H 1263 6500 50 0001 C CNN F 2 "Resistor_SMD:R_0805_2012Metric" H 1263 6500 50 0001 C CNN
F 3 "~" H 1225 6650 50 0001 C CNN F 3 "~" H 1225 6650 50 0001 C CNN
1 1225 6650 1 1225 6650

20
DC-Load-Analog.sch-bak
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@ -1166,24 +1166,4 @@ F 3 "" H 9575 5000 50 0001 C CNN
$EndComp $EndComp
Wire Wire Line Wire Wire Line
9575 4900 9575 5000 9575 4900 9575 5000
$Comp
L Device:R_POT RV2
U 1 1 6090B930
P 4900 2300
F 0 "RV2" H 4831 2346 50 0000 R CNN
F 1 "10K" H 4831 2255 50 0000 R CNN
F 2 "30V-3A-adjustable-regulator-:TRIM_3590S-2-103L" H 4900 2300 50 0001 C CNN
F 3 "~" H 4900 2300 50 0001 C CNN
1 4900 2300
1 0 0 -1
$EndComp
Wire Wire Line
4900 2150 5275 2150
Connection ~ 5275 2150
Wire Wire Line
5425 2300 5050 2300
Connection ~ 5425 2300
Wire Wire Line
4900 2450 5275 2450
Connection ~ 5275 2450
$EndSCHEMATC $EndSCHEMATC