564 lines
20 KiB
C
564 lines
20 KiB
C
/**
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******************************************************************************
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* @file stm32g0xx_hal_hcd.h
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* @author MCD Application Team
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* @brief Header file of HCD HAL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2018 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32G0xx_HAL_HCD_H
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#define STM32G0xx_HAL_HCD_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32g0xx_ll_usb.h"
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#if defined (USB_DRD_FS)
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/** @addtogroup STM32G0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup HCD HCD
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup HCD_Exported_Types HCD Exported Types
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* @{
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*/
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/** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition
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* @{
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*/
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typedef enum
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{
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HAL_HCD_STATE_RESET = 0x00,
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HAL_HCD_STATE_READY = 0x01,
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HAL_HCD_STATE_ERROR = 0x02,
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HAL_HCD_STATE_BUSY = 0x03,
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HAL_HCD_STATE_TIMEOUT = 0x04
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} HCD_StateTypeDef;
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typedef USB_DRD_TypeDef HCD_TypeDef;
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typedef USB_DRD_CfgTypeDef HCD_InitTypeDef;
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typedef USB_DRD_HCTypeDef HCD_HCTypeDef;
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typedef USB_DRD_URBStateTypeDef HCD_URBStateTypeDef;
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typedef USB_DRD_HCStateTypeDef HCD_HCStateTypeDef;
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typedef enum
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{
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HCD_HCD_STATE_DISCONNECTED = 0x00U,
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HCD_HCD_STATE_CONNECTED = 0x01U,
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HCD_HCD_STATE_RESETED = 0x02U,
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HCD_HCD_STATE_RUN = 0x03U,
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HCD_HCD_STATE_SUSPEND = 0x04U,
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HCD_HCD_STATE_RESUME = 0x05U,
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} HCD_HostStateTypeDef;
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/* PMA lookup Table size depending on PMA Size
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* 8Bytes each Block 32Bit in each word
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*/
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#define PMA_BLOCKS ((USB_DRD_PMA_SIZE) / (8U * 32U))
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/**
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* @}
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*/
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/** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition
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* @{
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*/
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#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
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typedef struct __HCD_HandleTypeDef
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#else
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typedef struct
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#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
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{
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HCD_TypeDef *Instance; /*!< Register base address */
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HCD_InitTypeDef Init; /*!< HCD required parameters */
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HCD_HCTypeDef hc[16]; /*!< Host channels parameters */
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uint32_t ep0_PmaAllocState; /*!< EP0 PMA allocation State (allocated, virtual Ch, EP0 direction) */
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uint16_t phy_chin_state[8]; /*!< Physical Channel in State (Used/Free) */
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uint16_t phy_chout_state[8]; /*!< Physical Channel out State (Used/Free)*/
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uint32_t PMALookupTable[PMA_BLOCKS]; /*PMA LookUp Table */
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HCD_HostStateTypeDef HostState; /*!< USB current state DICONNECT/CONNECT/RUN/SUSPEND/RESUME */
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HAL_LockTypeDef Lock; /*!< HCD peripheral status */
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__IO HCD_StateTypeDef State; /*!< HCD communication state */
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__IO uint32_t ErrorCode; /*!< HCD Error code */
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void *pData; /*!< Pointer Stack Handler */
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#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
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void (* SOFCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD SOF callback */
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void (* ConnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Connect callback */
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void (* DisconnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Disconnect callback */
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void (* PortEnabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Enable callback */
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void (* PortDisabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Disable callback */
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void (* HC_NotifyURBChangeCallback)(struct __HCD_HandleTypeDef *hhcd, uint8_t chnum,
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HCD_URBStateTypeDef urb_state); /*!< USB OTG HCD Host Channel Notify URB Change callback */
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void (* MspInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp Init callback */
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void (* MspDeInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp DeInit callback */
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#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
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} HCD_HandleTypeDef;
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup HCD_Exported_Constants HCD Exported Constants
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* @{
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*/
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/** @defgroup HCD_Speed HCD Speed
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* @{
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*/
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#define HCD_SPEED_FULL USBH_FSLS_SPEED
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#define HCD_SPEED_LOW USBH_FSLS_SPEED
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/**
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* @}
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*/
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/** @defgroup HCD_Device_Speed HCD Device Speed
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* @{
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*/
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#define HCD_DEVICE_SPEED_HIGH 0U
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#define HCD_DEVICE_SPEED_FULL 1U
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#define HCD_DEVICE_SPEED_LOW 2U
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/**
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* @}
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*/
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/** @defgroup HCD_PHY_Module HCD PHY Module
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* @{
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*/
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#define HCD_PHY_ULPI 1U
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#define HCD_PHY_EMBEDDED 2U
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/**
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* @}
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*/
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/** @defgroup HCD_Error_Code_definition HCD Error Code definition
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* @brief HCD Error Code definition
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* @{
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*/
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#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
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#define HAL_HCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
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#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup HCD_Exported_Macros HCD Exported Macros
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* @brief macros to handle interrupts and specific clock configurations
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* @{
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*/
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#define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
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#define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
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#define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\
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& (__INTERRUPT__)) == (__INTERRUPT__))
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#define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
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#define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
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#define __HAL_HCD_GET_CHNUM(__HANDLE__) (((__HANDLE__)->Instance->ISTR) & USB_ISTR_IDN)
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#define __HAL_HCD_GET_CHDIR(__HANDLE__) (((__HANDLE__)->Instance->ISTR) & USB_ISTR_DIR)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup HCD_Exported_Functions HCD Exported Functions
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* @{
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*/
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/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
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* @{
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*/
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HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
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uint8_t epnum, uint8_t dev_address,
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uint8_t speed, uint8_t ep_type, uint16_t mps);
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HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
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HAL_StatusTypeDef HAL_HCD_HC_Close(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
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void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
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#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
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/** @defgroup HAL_HCD_Callback_ID_enumeration_definition HAL USB OTG HCD Callback ID enumeration definition
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* @brief HAL USB OTG HCD Callback ID enumeration definition
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* @{
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*/
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typedef enum
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{
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HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
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HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
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HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
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HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
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HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
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HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
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HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
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} HAL_HCD_CallbackIDTypeDef;
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/**
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* @}
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*/
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/** @defgroup HAL_HCD_Callback_pointer_definition HAL USB OTG HCD Callback pointer definition
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* @brief HAL USB OTG HCD Callback pointer definition
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* @{
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*/
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typedef void (*pHCD_CallbackTypeDef)(HCD_HandleTypeDef *hhcd); /*!< pointer to a common USB OTG HCD callback function */
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typedef void (*pHCD_HC_NotifyURBChangeCallbackTypeDef)(HCD_HandleTypeDef *hhcd,
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uint8_t epnum,
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HCD_URBStateTypeDef urb_state); /*!< pointer to USB OTG HCD host channel callback */
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/**
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* @}
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*/
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HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd,
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HAL_HCD_CallbackIDTypeDef CallbackID,
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pHCD_CallbackTypeDef pCallback);
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HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd,
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HAL_HCD_CallbackIDTypeDef CallbackID);
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HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd,
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pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
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HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
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#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/* I/O operation functions ***************************************************/
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/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
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* @{
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*/
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HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
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uint8_t direction, uint8_t ep_type,
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uint8_t token, uint8_t *pbuff,
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uint16_t length, uint8_t do_ping);
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/* Non-Blocking mode: Interrupt */
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void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_SuspendCallback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_ResumeCallback(HCD_HandleTypeDef *hhcd);
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void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum,
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HCD_URBStateTypeDef urb_state);
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/**
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* @}
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*/
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/* Peripheral Control functions **********************************************/
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/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
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* @{
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*/
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HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_Suspend(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_Resume(HCD_HandleTypeDef *hhcd);
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HAL_StatusTypeDef HAL_HCD_ResumePort(HCD_HandleTypeDef *hhcd);
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/**
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* @}
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*/
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/* Peripheral State functions ************************************************/
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/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
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* @{
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*/
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HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
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HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
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uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
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/* PMA Allocation functions **********************************************/
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/** @addtogroup PMA Allocation
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* @{
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*/
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HAL_StatusTypeDef HAL_HCD_PMAlloc(HCD_HandleTypeDef *hhcd, uint8_t ch_num,
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uint16_t ch_kind, uint16_t mps);
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HAL_StatusTypeDef HAL_HCD_PMADeAlloc(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
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HAL_StatusTypeDef HAL_HCD_PMAReset(HCD_HandleTypeDef *hhcd);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup HCD_Private_Macros HCD Private Macros
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* @{
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*/
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/** @defgroup HCD_LOGICAL_CHANNEL HCD Logical Channel
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* @{
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*/
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#define HCD_LOGICAL_CH_NOT_OPENED 0xFFU
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#define HCD_FREE_CH_NOT_FOUND 0xFFU
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/**
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* @}
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*/
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/** @defgroup HCD_ENDP_Kind HCD Endpoint Kind
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* @{
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*/
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#define HCD_SNG_BUF 0U
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#define HCD_DBL_BUF 1U
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/**
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* @}
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*/
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/* Set Channel */
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#define HCD_SET_CHANNEL USB_DRD_SET_CHEP
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/* Get Channel Register */
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#define HCD_GET_CHANNEL USB_DRD_GET_CHEP
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/**
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* @brief free buffer used from the application realizing it to the line
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* toggles bit SW_BUF in the double buffered endpoint register
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* @param USBx USB device.
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* @param bChNum, bDir
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* @retval None
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*/
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#define HCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
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/**
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* @brief Set the Setup bit in the corresponding channel, when a Setup
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transaction is needed.
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* @param USBx USB device.
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* @param bChNum
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* @retval None
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*/
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#define HAC_SET_CH_TX_SETUP USB_DRD_CHEP_TX_SETUP
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/**
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* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @param wState new state
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* @retval None
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*/
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#define HCD_SET_CH_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
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/**
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* @brief sets the status for rx transfer (bits STAT_TX[1:0])
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @param wState new state
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* @retval None
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*/
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#define HCD_SET_CH_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
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/**
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* @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
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* /STAT_RX[1:0])
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval status
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*/
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#define HCD_GET_CH_TX_STATUS USB_DRD_GET_CHEP_TX_STATUS
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#define HCD_GET_CH_RX_STATUS USB_DRD_GET_CHEP_RX_STATUS
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/**
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* @brief Sets/clears CH_KIND bit in the Channel register.
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_SET_CH_KIND USB_DRD_SET_CH_KIND
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#define HCD_CLEAR_CH_KIND USB_DRD_CLEAR_CH_KIND
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#define HCD_SET_BULK_CH_DBUF HCD_SET_CH_KIND
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#define HCD_CLEAR_BULK_CH_DBUF HCD_CLEAR_CH_KIND
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/**
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* @brief Clears bit ERR_RX in the Channel register
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_CLEAR_RX_CH_ERR USB_DRD_CLEAR_CHEP_RX_ERR
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/**
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* @brief Clears bit ERR_TX in the Channel register
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_CLEAR_TX_CH_ERR USB_DRD_CLEAR_CHEP_TX_ERR
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/**
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* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_CLEAR_RX_CH_CTR USB_DRD_CLEAR_RX_CHEP_CTR
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#define HCD_CLEAR_TX_CH_CTR USB_DRD_CLEAR_TX_CHEP_CTR
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/**
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* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_RX_DTOG USB_DRD_RX_DTOG
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#define HCD_TX_DTOG USB_DRD_TX_DTOG
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/**
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* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @retval None
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*/
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#define HCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
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#define HCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
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/**
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* @brief sets counter for the tx/rx buffer.
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* @param USBx USB peripheral instance register address.
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* @param bChNum Endpoint Number.
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* @param wCount Counter value.
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* @retval None
|
|
*/
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|
#define HCD_SET_CH_TX_CNT USB_DRD_SET_CHEP_TX_CNT
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|
#define HCD_SET_CH_RX_CNT USB_DRD_SET_CHEP_RX_CNT
|
|
|
|
/**
|
|
* @brief gets counter of the tx buffer.
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|
* @param USBx USB peripheral instance register address.
|
|
* @param bChNum channel Number.
|
|
* @retval Counter value
|
|
*/
|
|
#define HCD_GET_CH_TX_CNT USB_DRD_GET_CHEP_TX_CNT
|
|
|
|
/**
|
|
* @brief gets counter of the rx buffer.
|
|
* @param Instance USB peripheral instance register address.
|
|
* @param bChNum channel Number.
|
|
* @retval Counter value
|
|
*/
|
|
__STATIC_INLINE uint16_t HCD_GET_CH_RX_CNT(const HCD_TypeDef *Instance, uint16_t bChNum)
|
|
{
|
|
UNUSED(Instance);
|
|
__IO uint32_t count = 10U;
|
|
|
|
/* WA: few cycles for RX PMA descriptor to update */
|
|
while (count > 0U)
|
|
{
|
|
count--;
|
|
}
|
|
|
|
return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bChNum));
|
|
}
|
|
|
|
/**
|
|
* @brief Gets buffer 0/1 address of a double buffer endpoint.
|
|
* @param USBx USB peripheral instance register address.
|
|
* @param bChNum Endpoint Number.
|
|
* @param bDir endpoint dir EP_DBUF_OUT = OUT
|
|
* EP_DBUF_IN = IN
|
|
* @param wCount: Counter value
|
|
* @retval None
|
|
*/
|
|
#define HCD_SET_CH_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
|
|
#define HCD_SET_CH_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
|
|
#define HCD_SET_CH_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
|
|
|
|
|
|
/**
|
|
* @brief gets counter of the rx buffer0.
|
|
* @param Instance USB peripheral instance register address.
|
|
* @param bChNum channel Number.
|
|
* @retval Counter value
|
|
*/
|
|
__STATIC_INLINE uint16_t HCD_GET_CH_DBUF0_CNT(const HCD_TypeDef *Instance, uint16_t bChNum)
|
|
{
|
|
UNUSED(Instance);
|
|
__IO uint32_t count = 10U;
|
|
|
|
/* WA: few cycles for RX PMA descriptor to update */
|
|
while (count > 0U)
|
|
{
|
|
count--;
|
|
}
|
|
|
|
return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bChNum));
|
|
}
|
|
|
|
/**
|
|
* @brief gets counter of the rx buffer1.
|
|
* @param Instance USB peripheral instance register address.
|
|
* @param bChNum channel Number.
|
|
* @retval Counter value
|
|
*/
|
|
__STATIC_INLINE uint16_t HCD_GET_CH_DBUF1_CNT(const HCD_TypeDef *Instance, uint16_t bChNum)
|
|
{
|
|
UNUSED(Instance);
|
|
__IO uint32_t count = 10U;
|
|
|
|
/* WA: few cycles for RX PMA descriptor to update */
|
|
while (count > 0U)
|
|
{
|
|
count--;
|
|
}
|
|
|
|
return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bChNum));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/* Private functions prototypes ----------------------------------------------*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* defined (USB_DRD_FS) */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* STM32G0xx_HAL_HCD_H */
|